A typical switched capacitor measurement circuit uses a gain stage for measuring the capacitance of a capacitor by comparison to a reference capacitor. A switching arrangement, with switches appropriately controlled by phase signals, alternately connects the capacitor to be measured and the reference capacitor between a reference voltage and an input voltage. In reset mode, both capacitors are discharged by being connected to the reference voltage. In gain mode, the reference capacitor is connected across the output and the inverting input node of the operational amplifier, and the capacitor to be measured is connected between the input voltage node and the inverting input node of the operational amplifier. In gain mode, the output voltage of the operational amplifier is representative of the capacitance to be measured.
However, when the capacitor the capacitance of which is to be measured, has a parallel parasitic resistor, the measurement is affected by an error which is the greater the smaller is the resistance of the resistor.